By Eric Schweibenz
On April 26, 2010, ALJ Theodore R. Essex issued the public version of his 132 page Initial Determination (“ID”) (dated January 22, 2010) in Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same (Inv. No. 337-TA-661).

Complainant Rambus, Inc. (“Rambus”) accused Respondents NVIDIA Corporation, Asustek Computer, Inc., ASUS Computer International, Inc., BFG Technologies, Inc., Biostar Microtech (USA) Corp., Biostar Microtech International Corp., Diablotek Inc., EVGA Corp., G.B.T. Inc., Giga-byte Technology Co., Ltd., Hewlett-Packard Co., MSI Computer Corp., Micro-star International Co., Ltd., Palit Multimedia Inc., Palit Microsystems Ltd., Pine Technology Holdings, Ltd., and Sparkle Computer Co. (collectively, “Respondents”) of infringing five patents directed towards memory devices and associated memory controllers used, for example, in personal computers, game systems and mobile phones.

The asserted patents fall into two categories (1) the Barth I patents consisting of U.S. Patent Nos. 6,470,405 (claiming a system and method for performing data transfers within a computer system.), 6,591,353 (claiming a method and apparatus for controlling data transfers to and from a dynamic random access memory), and 7,287,109 (claiming a method and apparatus for controlling data transfers to and from a dynamic random access memory); and (2) the Ware patents consisting of U.S. Patent Nos. 7,177,998 and 7,120,016 ((both claiming information storage and retrieval and, more specifically, to coordinating memory components).  The accused products incorporate NVIDIA memory controllers.

The Barth I Patents

Respondents argued that they did not infringe the Barth I patents because the accused products do not have a timing signal that initiates sampling and/or indicates when the device is to begin an operation such as reading, writing or transferring.  According to Respondents, Rambus failed to prove whether the signal actually initiates data.  ALJ Essex rejected this argument, holding that the memory data sheets for the accused products showed that they wait for a signal to begin sampling and will not sample absent the signal.

Respondents also argued that certain products do not infringe because they write data to the memory array during the precharge operation, rather than the write operation as required by the claims.  ALJ Essex rejected this argument as well, holding that the claims do not require the write operation to conclude before precharge operation so the precharge and write operations could overlap.  ALJ Essex concluded that the evidence showed the devices write data occurred during write operations.  According to the ID, since Respondents import the products, they directly infringe the Barth I patents and also indirectly infringe by instructing users how to use the devices.

Respondents’ allegations that the Barth I patents were anticipated, obvious and/or invalid for double patenting were rejected by ALJ Essex.

The Ware Patents

Turning his focus to the Ware patents, ALJ Essex also found the accused products infringed directly and indirectly, but found that both Ware patents were invalid as anticipated and obvious.  Respondents argued that the Ware patents were anticipated by U.S. Patent No. 6,292,903 ("Coteus") and U.S. Patent No. 6,226,757 ("Intel Ware Patent").  The Commission Investigative Staff (“OUII”) agreed with Respondents that the Coteus patent anticipated the claims of the Ware patents, but sided with Rambus in arguing the Intel Ware Patent did not anticipate.  ALJ Essex agreed with OUII in both instances, holding that the Ware patents were anticipated by Coteus but not by the Intel Ware Patent.

Respondents also argued that the Ware patents were obvious in light Coteus and the Intel Ware Patent.  While ALJ Essex agreed regarding Coteus, he held that Respondents had waived the right to move for obviousness in light of the Intel Ware Patent because they had failed to present obviousness arguments in their post-hearing briefs.

ALJ Essex rejected Respondents allegation of inequitable conduct based on Rambus’s failure to provide the Intel Ware Patent and a reference called the Hotrail paper.  In both instances, ALJ Essex found Respondents failed to prove either materiality or intent.

Unclean Hands

Respondents raised an unclean hands defense, based on Rambus’s conduct as part of a standard-setting organization and for spoliation of evidence.  According to Respondents, Rambus attended a Joint Electron Devices Engineering Council (JEDEC) meeting, related to standard-setting for random access memory.  Rambus then violated its JEDEC disclosure requirements and filed patent applications that would cover the standard.  ALJ Essex rejected this argument, following a prior Federal Circuit holding that Rambus had no disclosure duty at the time it filed the applications.

As for spoliation, Rambus organized “shred days” prior to enforcing its patents.  According to Respondents, Rambus deliberately destroyed evidence.  ALJ Essex discussed prior court findings on this issue and concluded that the evidence “puts Rambus and its business ethics in an unfavorable light each and every time.”  ALJ Essex held that Rambus violated its duty to preserve evidence, its destruction was done with a culpable state of mind, and that the destroyed evidence was relevant to the issues in the case.  Respondents were not able to show, however, that they were prejudiced by the destruction and their failure to prove this essential element defeated their defense.


Having already found in October 2009 that Rambus had established domestic industry, ALJ Essex turned to the proposed remedies.  He recommended a Limited Exclusion Order and Cease and Desist Order for the accused products found to have infringed the Barth I patents.  ALJ Essex rejected Rambus’s request for 100% bond during the Presidential Review Period, but recommended the Commission set a bond at a reasonable royalty rate of the entered value of the accused products.